一种高增益低功耗锁相放大器电路设计Design of a high-gain and low power consumption lock-in amplifier circuit
张建亮,殷树娟,王小妮
摘要(Abstract):
针对便携式电子设备在微弱信号检测中对高增益、低功耗电路的需求,基于SMIC 180 nm BCD混合信号工艺,设计了一款高增益低功耗锁相放大器电路。采用二阶全通滤波器设计移相电路,实现0°~360°全相位连续可调,突破了传统移相范围的限制;采用减法电路+并联耦合对结构,构建四象限模拟乘法器,有效降低了电路功耗;采用有源低通滤波器替代无源电阻电容(resistor-capacitor, RC)滤波器以提升增益。仿真结果表明,该电路在1.8 V电源供电下,增益达109 dB,功耗为659.7μW,全相位锁相放大性能稳定,相较于同类设计,其在增益与功耗控制方面优势显著,可有效满足便携式设备对微弱信号高精度检测的需求。
关键词(KeyWords): 锁相放大器;低功耗;低通滤波器;模拟乘法器;BCD工艺
基金项目(Foundation): 北京市科技计划项目(Z231100006623012)
作者(Author): 张建亮,殷树娟,王小妮
DOI: 10.16508/j.cnki.11-5866/n.2025.06.012
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